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Marvell

Santa Clara, CA
AIIndustrials

Designs data-infrastructure chips: custom AI accelerators (XPUs) built with hyperscale cloud customers, plus optical interconnect DSPs and Ethernet switching silicon for AI clusters.

20 open roles
Advanced Packaging Intern, BS - Summer 2027
Burlington, VT
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Advanced Packaging Intern, MS - Summer 2027
6 Locations
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Analog Design Intern - Master's Degree (Quarter Schools / Fall 2026 Start Dates)
Westlake Village, CA
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Analog Design Intern, MS - Summer 2027
2 Locations
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Analog Engineer Intern - PhD
Vancouver, Canada
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Analog Engineer Intern - PhD
Toronto, Canada
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Analog Engineer Intern - PhD
Ottawa, Canada
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Application Engineer Intern, MS - Summer 2027
2 Locations
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Applied Machine Learning Scientist Intern - PhD
Santa Clara, CA
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Design Verification Intern, BS - Summer 2027
5 Locations
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Design Verification Intern, MS - Summer 2027
5 Locations
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Design for Test Intern, BS - Summer 2027
4 Locations
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Design/DSP/Verification Intern - PhD Degree
Santa Clara, CA
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Functional Validation Intern, BS - Summer 2027
3 Locations
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IC Validation Engineer Intern, MS - Summer 2027
3 Locations
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Physical Design Engineer Intern, BS - Summer 2027
7 Locations
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Physical Design Engineer Intern, MS - Summer 2027
7 Locations
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Process Engineer Intern, MS - Summer 2027
Santa Clara, CA
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Reliability Intern, BS - Summer 2027
Santa Clara, CA
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Silicon Photonics Intern - PhD (Fall 2026 Start Date)
Ottawa, Canada
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